Result
In this secon, we delve into the mulfaceted strategies and innovaons that have been
explored to enhance energy eciency in modern compung systems through advanced
architectural techniques. Our discussion encompasses a range of approaches from
hardware opmizaons, such as Non-Uniform Memory Access (NUMA) adjustments and
Simultaneous Multhreading (SMT) enhancements, to soware intervenons like
dynamic voltage and frequency scaling (DVFS) and predicve modeling. Each strategy is
examined for its potenal to reduce energy consumpon while maintaining or improving
performance, illustrang the complexity and necessity of cross-disciplinary eorts in
achieving sustainable compung pracces.
NUMA opmizaon
The arcle "Energy-ecient I/O Thread Schedulers for NVMe SSDs on NUMA" [1]
presents a thorough invesgaon into the performance and energy eciency of using a
large number of parallel I/O threads. This study highlights that when managing I/O
operaons on Non-Uniform Memory Access (NUMA) architectures with NVMe Solid
State Drives (SSDs), the impact of CPU contenon—where mulple processes compete
for CPU me—is signicantly less detrimental than the impact of remote access. Remote
access refers to the process of accessing data from SSDs that are not directly connected
to the CPU aempng the access, which is a common scenario in NUMA systems. These
ndings suggest that opmizing for reduced remote access to NVMe SSDs could lead to
more substanal performance and energy eciency improvements than merely focusing
on minimizing CPU contenon in systems employing numerous parallel I/O threads.
So, they present a new algorithm on NVMe SSDs on NUMA - ENERGY-EFFICIENT I/O
SCHEDULER(ESN)
Background-NUMA
In the class, we have learned about Symmetric Mulprocessing (SMP). SMP involves a
system where all CPUs share the same memory resources via the same memory bus,
ensuring equal access speeds for all processors, hence the term "symmetric." However,
as the number of CPUs increases, memory access conicts also rise, leading to a rapid
decline in the eciency and performance of the CPUs. On the other hand, Non-Uniform
Memory Access (NUMA) divides CPUs into mulple nodes, with each node possessing its
own independent memory space, allowing for high-speed interconnect communicaon
between nodes. In NUMA architectures, the speed at which a CPU accesses memory
varies depending on the node; accessing local node memory is fastest, while accessing
remote node memory is slower, with speed decreasing as the distance increases. This